This information was shared by one of the Twitter users, who posted on his account page a link to the registered result of the SuperMicro X12DAi-N SMC X12 platform in the SiSoft database.
At first glance, before us is a usual unannounced 6-core, 12-thread Intel engineering chip operating at a frequency of 3GHz. There were countless leaks on similar processors. But this particular sample has a feature that is quite atypical for current Intel CPUs – the configuration of the cache memory of the second and third levels.
The unknown 6-core chip has 1.25MB L2 cache per core, which gives us a 7.5MB L2 cache for the entire chip. In comparison, modern Intel desktop processors have only 256KB of L2 cache per core, and the total capacity for a six-core chip is 1.5MB! Even the top-end Core-X series has 1MB L2 per core.
In addition, the unannounced processor has a rather interesting 9MB L3 cache, which gives us just 1.5MB per core. However, in this case, current Intel CPUs have a significantly larger L3 per core – 2MB.
Building on early leaks found in the Geekbench benchmark database, the only architecture that will have a similar L2 and L3 cache configuration is the future Intel Tiger Lake. According to the official information from Intel, it can only be expected at the end of 2020 – beginning of 2021, but already on 10-nanometer process technology.
Source: WccfTech
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